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05/19/26 4:13:32pmLogin ] [ Main index ] [ Post a new message ] [ Search | Check update time | Archives: 1234[5] ]
Subject: Re: vacuming toast


Author:
Geo
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Date Posted: 10/ 5/04 4:03:12pm
In reply to: tjm 's message, "vacuming toast" on 10/ 5/04 3:11:41pm

>what are you learning?

Assertion-based verification methodology (review for me - I introduced it to the group a year ago - new to the rest of the group).

Verilog (it's essentially a hardware coding language - review for me, used on last project - 1 or 2 out of 10 in the group also using it) We are switching from a different language: VHDL. A couple of the guys in the group have no practical experience in either (and are blissfully happy).

SystemVerilog - emerging standard, state of the art hardware and verification language. Still a little early to fully adopt due to tool support. New for everyone.

I also have my yearly review (I just found out).

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Re: vacuming toastpjk10/ 7/04 8:26:49am


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